The invention relates to a high-frequency bipolar transistor comprising at least an emitter contact adjoining an emitter connection region, a base contact adjoining a base connection region, a collector contact adjoining a collector connection region, a buried layer being provided as the collector connection region, said buried layer connecting the collector contact to the collector zone. Such a high-frequency bipolar transistor is known from U.S. Pat. No. 5,773,350.
The invention furthermore relates to a method for the production of a high-frequency bipolar transistor, in which a collector connection region, a collector zone, at least on the collector connection region a first insulation layer, a base zone, a base connection region, at least on the base connection region a second insulation layer and an emitter connection region are made available, the collector connection region being embodied as a buried layer. Such a method is known from DE 19958062.
The equation below holds true for a bipolar transistor:
      1          2      ⁢                          ⁢      π      ⁢                          ⁢              f        T              =            τ      f        +                  (                              R            C                    +                      R            E                          )            ⁢              C        BC              +                                        C            BE                    +                      C            BC                                    I          C                    ⁢              U        T            where fT is the transition frequency, ôf is the transit time, RC is the collector resistance, RE is the emitter resistance, CBC is the base-collector capacitance, CBE is the base-emitter capacitance, IC is the collector current and UT is the thermal voltage.
As the collector current IC increases, the term proportional to 1/IC becomes smaller and smaller. The principal proportion of the transition frequency fT is therefore given, besides the transit time ôf, in particular by the collector resistance RC and the emitter resistance RE. In present-day transistors, however, the transition frequency fT is given, besides the transit time ôf, principally by the collector resistance RC, which is typically an order of magnitude greater than the emitter resistance RE. Therefore, the collector resistance must be minimized for fast transistors.
In order to obtain a low-impedance collector connection, use is generally made of a highly doped buried layer. This layer is produced at the beginning of the transistor production. After it, a semiconductor layer in which the emitter, base and collector zones are produced is grown epitaxially on said low-impedance layer. The highly doped buried layer is connected by means of a metallic collector contact and led to the surface of the bipolar transistor. This is described for example in U.S. Pat. No. 5,773,350 and DE 19958062.
In general, a collector contact is provided on only one side of the transistor. If the buried layer is connected not just on one side but also on the opposite side or even annularly around the entire transistor zone, lower collector resistances may be obtained. Such transistor configurations have a resistance with a magnitude approximately a half or a quarter that of a configuration having only a single collector contact, since the collector current can flow not just toward one side, but toward two or four sides.
However, this embodiment entails significant disadvantages. Firstly, the transistor dimensions are enlarged by the additional collector contact zones. This leads to higher production costs on account of the larger substrate area required. Secondly, the collector-substrate capacitance of the bipolar transistor is also increased proportionally to the increasing area of the buried layer. This in turn leads to adverse effects, such as a higher gate delay time or increased power consumption of integrated circuits.